1. Field of the Invention
The present invention relates in general to a method for treating the surface of a deep trench. More particularly, the present invention relates to a method for recovering the lattice of the silicon atoms in the surface of the deep trench.
2. Description of the Prior Art
DRAM is memory capable of reading and writing information. Each DRAM cell needs only one transistor and one capacitor, therefore it is easy to reach higher integration to make it broadly applicable to computers and electric equipment. A trench capacitor is one of the most commonly used capacitors, and is formed in the silicon semiconductor substrate. With the enhancement of the depth of the trench capacitor in the silicon semiconductor substrate, the surface area of the trench capacitor is increased, so that the capacitance is increased.
The traditional fabricating method of trench capacitors is described below. A trench is formed in a silicon semiconductor substrate. An As-doped silicon oxide layer is formed over the silicon semiconductor substrate with the trench. A photoresist is coated and removed by dry etching until the upper surface of the patterned photoresist is lower than that of the silicon semiconductor substrate by a predetermined distance. The exposed silicon oxide layer is removed using the remaining photoresist as a mask. Then, the doped ions, As, in the silicon oxide layer are driven into the silicon semiconductor substrate to form a conducting layer as a lower electrode of the trench capacitor.
With trends toward high capacitance and integration, the depth of the deep trench capacitor should be increased to gain more capacitance without sacrificing the integration. Therefore, the etching time should be increased, by which the structure of the crystal surface within the deep trench is damaged. Pits and dislocations are formed, creating a relatively rough surface. After undergoing subsequent thermal processes, these situations severely deteriorate, resulting in current leakages and damaging the effectiveness of the deep trench capacitor.
Therefore, the present invention provides a method for recovering the disordered lattice of silicon atoms in the surface of the deep trench.
Furthermore, the present invention provides a method for treating the surface of the deep trench, which can be applied to fabricate a deep trench capacitor with good electrical properties.
The present invention provides a method for treating the surface of a deep trench, comprising the following steps. After forming the deep trench in the single crystal silicon substrate, an amorphous treating process is executed to form an amorphous silicon layer on the surface of the deep trench. Then an annealing process is performed.
A method of fabricating a lower electrode of a deep trench capacitor comprises the following steps. After the deep trench is formed in the single crystal silicon substrate, an amorphous treating process is executed to form an amorphous silicon layer on the surface of the deep trench. A conformal silicon oxide layer doped with a conducting dopant is formed on the substrate. A photoresist layer is formed on the conformal silicon oxide layer. A part of the photoresist layer is removed to make the top surface of the photoresist layer lower than the top surface of the single crystal silicon substrate with a distance. Before the other part of the photoresist layer is removed, the exposed, conformal silicon oxide layer is removed. Then an thermal process is proceeded to drive the conducting dopant inside the conformal silicon oxide layer into the substrate, so as to form a lower electrode.
In accordance with the present invention, the amorphous treating process is an ion implantation process. The ion implanting angle xcex8 in the ion implantation process depends on the depth (d) and width (w) of the deep trench, and is (90xc2x0xe2x88x92tanxe2x88x921 d/w) xc2x10.50xc2x0. The dopant used in the ion implantation process is selected from the group consisting of silicon, germanium, and inert gas. The inert gas is selected from the group consisting of nitrogen (N2), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn). The ion implanting energy used in the ion implantation process is about between 200 keV and 200 eV. The dosage used in the ion implantation process is between 1xc3x971014 and 1xc3x971017.